[Eecs-news-links] Analog-Mixed-Signal (ADC) IC Intern @ Nokia (Sunnyvale, CA)

Batten, Tina tina.batten at oregonstate.edu
Wed Apr 13 10:17:35 PDT 2016

Intern, Analog - Mixed-Signal (ADC) IC

Team description
Nokia Networks (NET) is responsible for managing Nokia’s infrastructure assets, and making select investments in advanced research and development (R&D) to drive innovation for new applications such as 5G. The Architectures & Technologies (A&T) division within NET will create valuable IP for Nokia by engaging with leading business-to-business (B2B) customers to enhance their competitive advantage.
The NET RFIC program within A&T is located in Sunnyvale, California where it innovates and develops differentiating wireless solutions for Nokia’s products as well as concepts for future wireless standards in the areas of radio implementation. The team is multi-disciplinary and enjoys fruitful collaborative partnerships with top universities, international research institutes and network operators. Be part of this exciting team and successfully drive the future of wireless communications!
We are now looking for an Intern, Analog - Mixed-Signal (ADC) IC to join our team.
Key responsibilities
In this role, you will be responsible for designing innovative Analog and Mixed-Signal Integrated Circuits for use in an Analog-Digital Converter (ADC) that will be used in the delivery of a disruptive transceiver chipset. Disruptive RF design techniques are warranted to address the proliferation of 5G, to be supported by cost-effective hardware. As a member of the NET RFIC team, you will be an active contributor to team goals and, therefore, have a proven track record of professionalism. You enjoy working independently but, with an introspective critical viewpoint of conventional design techniques. As Intern, Mixed-Signal (ADC) IC you will effectively communicate your design ideas to fellow designers and to Lead Architect.
In order to succeed in this exciting role, we expect you to have experience in one or more of following technical areas:
•           RFIC Direct Conversion Receive and Direct Launch Transmit line-ups
•           Mixed-Signal IC Design with experience in the design of CMOS high-speed circuits such as:
•                       Analog-to-Digital Converters (ADCs) techniques such as Pipeline, SAR, Nyquist
•                       PLLs (Phased-lock loops),
•                       DAC (Digital-to-Analog Converters),
•                       Continuous-Time Filters,
•                       Thorough knowledge of Delta-Sigma Modulators.
•           Design experience with Cadence Design Environment tools (e.g., Virtuoso, SpectreRF)
•           Design experience with Verilog-A(MS) and / or VHDL
•           Measurement and evaluation of ADCs
•           Experience in LTE / WCDMA / Wi-Fi chipset design preferred
•           Custom IC layout, in deep submicron CMOS at and below 65 nm node
•           Good understanding of the wireless systems, e.g. 3GPP LTE, WCDMA and Wi-Fi
•           Strong communication and inter-personal skills, developing/driving concepts and ideas with other team members and across other parts of a large organization (or other companies).
•           MSc in Electrical Engineering (or related discipline) desired
Contact: Michael.Reiha at nokia.com
-------- Forwarded Message --------
NOKIA: Analog / RFIC Internships
Date:Wed, 13 Apr 2016 04:11:18 +0000
From:Reiha, Michael (Nokia - US/Sunnyvale) <michael.reiha at nokia.com>

My name is Michael Reiha and I am Director, RFIC Architectures at Nokia Networks.
We having several internships at our location in Sunnyvale, CA.
Attached are advertisements for your perusal.

More information about the Eecs-news-links mailing list