[Eecs-news-links] Fwd: Aquantia Analog Design Opportunities
tina.batten at oregonstate.edu
Tue Apr 2 08:25:39 PDT 2013
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Aquantia Analog Design Opportunities
Tue, 2 Apr 2013 01:43:35 +0000
HiokTiaq Ng <HiokTiaq.Ng at aquantia.com><mailto:HiokTiaq.Ng at aquantia.com>
Over here in the Bay Area, I am trying to recruit analog designers for my team for the company's next phase of expansion. Would like to request your help in getting the word out to your students and friends about this opportunity to join a successful mixed-signal SOC company on its way to being a profitable company very soon. As you may know, we also had a paper in last December's JSSC that details the work that we do. High speed high linearity baseband analog with a lot of digital assistance and I hope your students will find that exciting.
The job description is as below...
Interested parties can send their resumes directly to me and also jobs at aquantia.com<mailto:jobs at aquantia.com>
Aquantia is the technical and semiconductor market share leader in the field of 10GBase-T transceivers, the next generation of solutions for server and consumer high speed Ethernet connectivity. We are a growing company gearing up for the next phase of growth, having successfully introduced and productized several industry firsts....
1) Industry first monolithic 10GBase-T transceiver chip
2) Industry first monolithic dual port 10GBase-T with MAC
3) Industry first Lan-On-Motherboard 10GBase-T solution
4) First company to ship a cumulative 1 Million ports of 10GBase-T solutions in a nascent market
Multiple Openings for Senior and Mid-Level Analog Circuit design positions at Aquantia based in Milpitas, CA
Responsible for the design, verification and characterization of analog/mixed-signal circuitry for high speed data communication ICs. Will be involved in the implementation of complex analog building blocks, including but not limited to high resolution, low power Analog-to-Digital Converter (ADC), and Digital to Analog Converter (DAC), Phase Locked Loops (PLLs), programmable gain amplifiers and line drivers. Additional responsibilities are the development of circuit test plans and the characterization of analog building blocks. This also includes the interaction, cooperation and support with/for internal and external customers.
Minimum Education & Experience Levels:
Senior Level Position: MSEE with minimum 4 years industry experience or PhD with 2 -- 4 years of industry experience
Mid-Level Position: MSEE with 2 - 4 years of industry experience.
1. Must have direct design and silicon debug experience in at least two of the following areas:
a. Nyquist Rate ADC, Sigma-Delta ADC,
b. DAC, Line driver,
c. Programmable Gain Amplifier, LNAs, Equalizers,
d. High Performance Phase Locked Loops.
2. Candidate should be able to communicate well with the other engineers and work in a team collaboratively.
3. Familiarity with wide spectrum of analog circuit simulation tools, Cadence Virtuoso environment and Matlab.
4. Further experience in the below subjects would be a plus.
a. Experience in Ethernet transceiver (100M/1G/10G Ethernet), DSL, Disk Drive Read Channel, Wireless Transceiver Analog Front End designs.
b. Deep submicron (90nm and below) CMOS Process understanding including the analog/mixed-signal design flow.
c. Understanding of digital communication systems theory.
d. Chip integration experience on successful complex analog chips with Reliability/Physical Verification flows.
e. Experience in bringing to production 2 successful complex analog centric chips.
Aquantia offers competitive compensation packages (with stock options) commensurate with experience level.
If interested, please send all resumes to jobs at aquantia.com<mailto:jobs at aquantia.com>
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